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The AWE32 didn't use its MPU-401 port to access the EMU8000—Creative decided to expose the EMU8000's registers directly, through three sets of non-standard ports, and interpret MIDI commands in software on the host CPU.

2 EMU8000 Interface
The EMU8000 in the AWE32 environment appears as one doubleword I/O port two I/O ports
which may serve as either a doubleword or two separate word ports and two word only I/O ports
located relative to the BLASTER environment variable. These ports are named as follows:
Location Size Name Function
BLASTER+0x400 Doubleword Data0 Read and write of doubleword data
BLASTER+0x800 Word or
Doubleword
Data1 Read and write of word and doubleword
data
BLASTER+0x802 Word Data2 Read and write of word data
EMU8000 Programmer's Guide Page 7
Copyright  E-mu/Creative Technolgy Ltd. 1994-1996. All Rights Reserved.
BLASTER+0xC00 Word Data3 Read and write of word data
BLASTER+0xC02 Word Pointer Read and write of register pointer value
NOTE : This EMU8000 I/O ports documented in table above is only valid for legacy cards. With
the introduction of Plug & Play cards, EMU8000 base port is no longer guaranteed to be at
BLASTER+0x400. You should read the 'E' parameter of the BLASTER environment variable to
get the EMU8000 base port. For example, if the BLASTER environment is "A220 I5 D1 H5
P330 E640 T6 " , then EMU8000 ports will be located at
• 0x640-0x643
• 0xA40-0xA43
• 0xE40-0xE43
All I/O transactions must be performed as word or “doubleword” I/O transactions; no byte I/O
transactions are allowed. A “doubleword” I/O transaction consists of a transfer of the LS 16 bit
word of data from the specified I/O address, followed immediately by a transfer of the MS 16
bits of data from the I/O address two bytes higher.
Most reads and writes of the EMU8000 begin by writing the Pointer register. The Pointer
register is a word register whose LS five bits are the Channel Number (0-31), whose next 3 bits
(bits 7-5) are the Register Number (0-7), and whose MS 8 bits are Don’t Care (but
conventionally zero) for a write and are random (actually a VLSI test register) during reads.
Once the pointer register has been set to the appropriate Channel and Register Numbers, the
corresponding EMU8000 register can be written or read at the appropriate Data I/O port. The
EMU8000 makes use of the I/O WAIT function of the bus to prevent changing the Pointer
Register before a previous write transaction is complete, and to allow for reading the data from
the EMU8000 internal registers before allowing completion of a read transaction.